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SMC-IT 2011
TOPICS OF INTEREST

Reliable Software

Autonomy & Automation
CubeSat Software

Space Cybersecurity
Robotics Software

Engineering Design Tools
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Real-Time Embedded Systems
Machine Vision
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SCHEDULE

OCTOBER 1, 2010
Call for Full Papers and Mini-Workshop Summaries

NOVEMBER 1, 2010
Author Submission Website Open

DECEMBER 31, 2010
Call for Full Papers and Mini-Workshop Summaries

MARCH 20, 2011
Author Acceptance Notification

MAY 19, 2011
Early Bird Registration Opens

MAY 19, 2011
Preliminary Program Announced

MAY 20, 2011
Camera Ready Manuscripts Due (incorporating reviewer comments) for upload to the IEEE CPS website

JULY 1, 2011
Regular Registration Opens

AUGUST 2 - 4, 2011
Conference

SMC-IT 2011 TOURS
(August 5, 2011)

USGS, Menlo Park Tour

 
NASA Ames Research Center Tour

 
Computer History Museum

 
Intel Museum (on your own)
 Intel Museum

 
Hiller Aviation Museum

Ames Wind TunnelCrowne Plaza Cabana HotelComputer-History-MuseumAmes Pleiades SupercomputerIntel 80 Core Teraflops Research Wafer
NOTE: To receive future announcements, please send a blank email to:
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Fourth IEEE International Conference on
Space Mission Challenges for Information Technology

Keynote Presentation

Bill DallyBill Dally
Bell Professor of Engineering, Stanford University
Chief Scientist, NVIDIA





Abstract:

Energy efficiency and programmability are the two major challenges to achieving ExaScale computing in the next decade. To achieve ExaScale performance at a reasonable total system power, we must reduce the energy per operation from about 2nJ today to less than 20pJ.  Only 3-4x of this 100x reduction is expected to come from improved semiconductor technology. Because most of the energy per operation is spent moving data up and down the memory hierarchy, an ExaSacle machine, its applications, and its programming system must work together to carefully orchestrate data movement to exploit all available locality. Energy efficient throughput-optinmized cores are also required.

Exposing sufficient parallelism to fill an ExaScale machine while identifying all available locality requires a fine-grained approach to parallel programming and an abstract model of locality. With appropriate hardware mechanisms, locality-aware, fine-grain parallel programming can be made both efficient and productive.

Bio:

William James "Bill" Dally is the Willard R. and Inez Kerr Bell Professor in the Stanford University School of Engineering and past Chairman of the Computer Science Department at Stanford. Previously he taught at MIT where he and his group built the J–Machine and the M–Machine, parallel machines emphasizing low overhead synchronization and communication. Prior to that, at Bell Telephone Laboratories he contributed to the design of the BELLMAC32, an early 32-bit microprocessor, and designed the MARS hardware accelerator.

He has developed a number of techniques used in modern interconnection networks including routing-based deadlock avoidance, wormhole routing, link-level retry, virtual channels, global adaptive routing, and high-radix routers. He has developed efficient mechanisms for communication, synchronization, and naming in parallel computers including message-driven computing and fast capability-based addressing. He has developed a number of stream processors starting in 1995 including Imagine, for graphics, signal, and Image processing, and Merrimac, for scientific computing.
Dally was elected a Fellow of the Association for Computing Machinery in 2002, and a Fellow of the IEEE, also in 2002. He received the ACM/SIGARCH Maurice Wilkes Award in 2000 and the Seymour Cray Computer Science and Engineering Award in 2004. In 2007 he was elected to the American Academy of Arts and Sciences, and in 2009 the National Academy of Engineering. He received the 2010 ACM/IEEE Eckert–Mauchly Award for "outstanding contributions to the architecture of interconnection networks and parallel computers."

He has published over 200 papers in these areas and is an author of the textbooks "Digital Systems Engineering" with John Poulton, and "Principles and Practices of Interconnection Networks" with Brian Towles. He has been inventor or coinventor on over 70 granted patents and has several more pending.

He received the B.S. degree in Electrical Engineering from Virginia Polytechnic Institute, the M.S. degree in Electrical Engineering from Stanford University, and the Ph.D. degree in Computer Science from Caltech. At Caltech he designed the MOSSIM Simulation Engine and the Torus Routing Chip.

Bill's corporate involvements include various collaborations at Cray Research since 1989, internet router work at Avici Systems starting in 1997, CTO at Velio Communications from 1999 until its 2003 acquisition by LSI Logic, founder and former chairman of Stream Processors, Inc., and most recently, chief scientist of NVIDIA.